MSPI 16x external RAM input timing delay number control register
SPI_SMEM_DIN08_NUM | the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… |
SPI_SMEM_DIN09_NUM | the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… |
SPI_SMEM_DIN10_NUM | the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… |
SPI_SMEM_DIN11_NUM | the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… |
SPI_SMEM_DIN12_NUM | the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… |
SPI_SMEM_DIN13_NUM | the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… |
SPI_SMEM_DIN14_NUM | the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… |
SPI_SMEM_DIN15_NUM | the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… |
SPI_SMEM_DINS_HEX_NUM | the input signals are delayed by system clock cycles, 0: delayed by 1 cycle, 1: delayed by 2 cycles,… |